In a processing for forming a multilayer interconnection structure included in a semiconductor device manufacturing process, a low-k film, e.g., a SiCOH film containing silicon (Si), carbon (C), hydrogen (H) and oxygen (O), is formed as an interlayer dielectric film and, then, a recess such as a trench or a via hole is formed in the interlayer dielectric film. Next, an upper wiring connected to a lower wiring is formed by burying copper in the recess. In order to prevent the copper from being diffused in the interlayer dielectric film, Ta (tantalum), TaN (tantalum nitride), or a laminated film thereof, for example, is formed as a so-called barrier film between the copper wiring and the interlayer dielectric film. In addition, Ti (titanium), TiN (titan nitride), or a laminated film thereof is known as the barrier film.
As a line width of a copper wiring is miniaturized along with miniaturization of a pattern of a semiconductor device, a wiring resistance or an electrode resistance (via resistance) in a via hole is increased, and this affects performance of the semiconductor device. In order to decrease a resistance of a conductive path (wiring and electrode), it is required to increase volume of Cu and decrease a via resistance by reducing a film thickness of an adhesion film or a barrier film formed at a bottom portion of the via hole and decreasing the number of interfaces.
Meanwhile, the above-described material used for the barrier film has a high resistance and is disadvantageous in that burial characteristics thereof become poor when the line width of the burying recess is miniaturized and the aspect ratio is increased.
In view of the above, it is suggested to use a barrier film made of Ru (ruthenium) having a low resistance and good burial characteristics, instead of the above-described material (U.S. Patent Application Publication No. US2008/237860A1 (FIG. 1)). FIGS. 25A to 25E show processes of forming a copper wiring in the case of using Ru as a barrier film.
First, a burying recess 2 such as a trench or a via hole is formed in an upper interlayer dielectric film (SiCOH film) 1 in FIG. 25A. Next, a base film 3 such as Ta, TaN or the like 3 is formed in the recess 2 in FIG. 25B. Then, a Ru film 4 is formed on the base film 3 in FIG. 25C. Thereafter, a copper material (buried material made of copper) 5 is buried in the recess 2 in FIG. 25D and, then, a residual copper material 5 is removed by CMP (Chemical Mechanical Polishing). As a result, an upper wiring structure is formed in FIG. 25E. Reference numerals ‘61 to 63’ indicate a lower interlayer dielectric film, a copper wiring and a barrier layer, respectively. A reference numeral ‘64’ indicates an etching stopper film (film serving as a stopper during etching) having a function of preventing diffusion of copper.
The reason that the base film 3 is interposed between the interlayer dielectric film 1 and the Ru film 4 is described as follows.
The bonds in the SiCOH film as the interlayer dielectric film 1 are terminated by a plasma during etching or ashing, so that C is separated from the film. Dangling bonds generated by separation of C are bonded to moisture in the atmosphere or the like and turned into Si—OH. Thus, a surface layer may become a damage layer. The damage layer has a slightly increased relative dielectric constant because a concentration of C therein is decreased. If necessary, it is preferable to remove the damage layer. Further, the surface layer of the substrate may be removed by, e.g., hydrofluoric acid, in order to remove the damage layer or remove residues generated by etching or ashing from the surface of the substrate. Hence, the surface state of the interlayer dielectric film 1 just before the burial of the barrier film is highly hydrophobic.
Meanwhile, Ru has a high Gibbs' free energy of oxide formation and thus is not easily bonded to O of the SiCOH film. Therefore, a base film 3 made of Ta having a low Gibbs' free energy of oxide formation or the like is thinly formed. In that case, the Ru film 4 is used as the barrier film, so that the effect of poor burial characteristics or high resistance of the base film 3 is decreased. However, since the base film 3 is interposed, in addition to the Ru film 4, between the lower copper and the upper copper at the bottom portion of the via hole, further improvement is required in order to reduce the resistance of the conductive path.
Japanese Patent Application Publication No. 2005-347472 (JP2005-347472A) (FIGS. 1 and 3) describes a technique in which a SiCOH film is processed with a hydrogen plasma to remove a methyl group or the like from the surface of a recess and terminate bonds with H. Thus, the problem, in which the film quality is deteriorated when the barrier film is formed in a state where a part of the SiCOH film subjected to plasma etching is coupled to the burying recess and thus nucleation occurs around the methyl group or the like, may be solved. This technique is different from that of the present invention in that the surface of the recess to be processed is hydrophilic.